1. Field of the Invention
This invention relates to the assembly of multichip modules and, more particular, to the assembly of integrated circuit chips having an array of contact pads within such multichip module.
2. Description of the Prior Art
In recent years, new technologies which can provide high-density interconnections within and between integrated circuits and in other applications within electronic equipment have emerged. These technologies include the assembling of multichip modules which may contain several unpackaged integrated circuit (IC) chips mounted on a single substrate.
Various techniques for assembling unpackaged IC chips in a multichip module are available. These modules may be assembled by, for example, using either wire bonded connections, tape-automatic-bonded (TAB) connections, or solder flip-chip bonding, depending on the desired number and spacing of signal input-output (I/O) connections on both the chip and the substrate as well as permissible cost.
In a comparison of these three techniques, wire bonding is the most common chip-bonding technique. This technique has traditionally provided the maximum number of chip connections with the lowest cost per connection. A disadvantage of wire bonding is that inductance present in the wires used in connecting the chip to the substrate degrades the electrical performance of the circuitry in the multichip module. Also, since the I/O connections are perimeter connections on the chip and since the wires connect to the substrate on an area not occupied by the chips, wire bonding requires more area on the substrate than that required in flip-chip bonding. Finally, wire bonding requires each connection between the chip and the substrate to be made one at a time and, therefore, is time consuming to assemble.
TAB bonding permits higher density I/O connections over wire bonding. This technique, however, is more expensive than wire bonding. This is, in part, because TAB bonding requires special tooling for each different chip design. Also like wire bonding, TAB bonding similarly requires I/O perimeter connections and therefore more area on a substrate than flip-chip bonding. There is also undesirable parasitic inductance which imposes a penalty on electrical performance of the IC chip circuitry connected using this bonding technique.
Flip-chip bonding of a multichip module is achieved by providing an IC chip with either perimeter or area array, solder wettable metal pads which comprise the signal (I/O) terminals on the chip and a matching footprint of solder wettable pads on the substrate. Before assembly onto the substrate, either the chip, the substrate, or both typically undergo a processing step as shown in FIG. 1 wherein a solid solder bump 11 is deposited at each signal (I/O) terminal on an IC chip 12 or on both an IC chip 16 and a substrate 17. The chip 12 (or 16) is then turned upside down and placed in an aligned manner on top of a substrate 13 (or 17) such that the solder bumps align with the wettable metal pads 14, or such that a pair of solder bumps on the chip 16 and the substrate 17 align with each other. All connections are then made simultaneously by heating the solder bumps to a reflow temperature at which the solder flows and an electrically conductive joint between the contact pads on both the substrate and the IC chip is formed. Such a process is described by R. R. Tummala and E. J. Rymaszewski in Microelectronics Packaging Handbook, New York: Van Nostrand Reinhold, 1989, pp. 366-391.
Thus flip-chip bonding of IC chips used in multichip modules provides the advantage of requiring less area on a substrate and thereby facilitates high-density interconnections of the chips comprising the module. Since the interconnections are short, well controlled electrical characteristics are provided. High-speed signals are thus propagated in and through the module with minimum delay and distortion. Also since flip-chip bonding is a batch process, all interconnections are made quickly and simultaneously through a solder reflow step.
Despite having the described advantages, flip-chip bonding is generally viewed as the most expensive of the three bonding techniques. Hence, it has traditionally been used in assembling only those high performance products where cost is generally not the controlling factor. Chips that are wire-bonded or TABed have generally sufficed in the past for use in those standard and high volume products wherein cost is a consideration. In view of the need for additional functions to be provided in increasingly smaller packages, thus requiring increased sophistication in package technologies, it is desirable that flip-chip bonding be achievable at low cost This bonding technique then becomes suitable for high volume applications while retaining the indicated technological advantages.